← clock1
→ clockd
CADR – MASTER CLOCK [clock2]
Find File:
Find Pin:
1D05
7428
1C10
74S02
1C10
74S02
1C13
74S10
1C13
74S10
1D04
7428
1D04
7428
1D04
7428
1D04
7428
1C06
74S10
1C07
74S00
1C11
7428
1C02
7428
1C02
7428
1C02
7428
1C02
7428
1C01
7428
1C11
7428
1C11
7428
1C01
7428
1D05
7428
1D05
7428
1D05
7428
1D10
74S08
1D10
74S08
1C06
74S10
1C07
74S00
1C07
74S00
1C06
74S10
MCLK1
GND
MCLK0
13≡
12≡
11≡
GND
TP? Tristate Enable
TPTSE
Tristate Enable. Alias of TPTSE.
TSE4
Tristate Enable. Alias of TPTSE.
TSE3
GND
TP? Tristate Enable
TPTSE
Tristate Enable. Alias of TPTSE.
TSE2
GND
TP? Tristate Enable
TPTSE
Tristate Enable. Alias of TPTSE.
TSE1
GND
TP? Tristate Enable
TPTSE
TPR25
CLOCK RESET B
TP? Tristate Enable
TPTSE
TP? Tristate Enable
TPTSE
TPR5
GND
TP? Write Pulse Instruction RAM
TPWPIRAM
Write Pulse. Alias of TPWPIRAM.
WP5
Write Pulse. Alias of TPWP.
WP4
GND
TP? Write Pulse
TPWP
Write Pulse. Alias of TPWP.
WP3
GND
TP? Write Pulse
TPWP
Write Pulse. Alias of TPWP.
WP2
GND
TP? Write Pulse
TPWP
Write Pulse. Alias of TPWP.
WP1
GND
TP? Write Pulse
TPWP
MCLK7
GND
MCLK0
MCLK5
GND
MCLK0
Alias of CLK0
CLK5
GND
Main clock signal.
CLK0
Alias of CLK0
CLK4
GND
Main clock signal.
CLK0
Alias of CLK0
CLK3
GND
Main clock signal.
CLK0
Alias of CLK0
CLK2
GND
Main clock signal.
CLK0
Alias of CLK0
CLK1
GND
Main clock signal.
CLK0
Main clock signal.
CLK0
MACHRUN
TPCLK
MCLK0
HI1
TPCLK
TPCLK
TPCLK
TPR0
CLOCK RESET B
TPREND
CLOCK RESET B
TPW70
TPW30
TP? Write Pulse
TPWP
MACHRUNA L
TP? Write Pulse Instruction RAM
TPWPIRAM
MACHRUNA L
TPW45
CLOCK RESET B
TPREND
4≡
5≡
6≡
10≡
9≡
8≡
8≡
9≡
11≡
10≡
6≡
5≡
3≡
4≡
13≡
12≡
11≡
10≡
9≡
8≡
4≡
5≡
6≡
1≡
2≡
3≡
6≡
5≡
3≡
4≡
5≡
4≡
6≡
1≡
2≡
3≡
13≡
12≡
11≡
10≡
9≡
8≡
4≡
5≡
6≡
1≡
2≡
3≡
4≡
5≡
6≡
10≡
9≡
8≡
4≡
5≡
6≡
1≡
2≡
3≡
10≡
9≡
8≡
4≡
5≡
6≡
1≡
2≡
3≡
2≡
1≡
3≡
9≡
10≡
8≡
12≡
13≡
2≡
1≡
2≡
1≡
3≡
9≡
10≡
8≡
8≡
9≡
11≡
10≡
This page:
clock2 –
CLK0
(→input)
clock2 –
CLK0
(→input)
clock2 –
CLK0
(→input)
clock2 –
CLK0
(→input)
clock2 –
CLK0
(output→)
clock2 –
CLK0
(→input)
Other pages:
Cancel
This page:
clock2 – CLK1 (output→)
Other pages:
clockd – CLK1 (→input)
clockd –
CLK1
(→input)
clockd –
CLK1
(output→)
Cancel
This page:
clock2 – CLK2 (output→)
Other pages:
clockd – CLK2 (→input)
Cancel
This page:
clock2 – CLK3 (output→)
Other pages:
clockd – CLK3 (→input)
Cancel
This page:
clock2 – CLK4 (output→)
Other pages:
clockd – CLK4 (→input)
Cancel
This page:
clock2 – CLK5 (output→)
Other pages:
olord2 –
CLK5
(output→)
olord2 – CLK5 (→input)
opcs –
CLK5
(→input)
opcs –
CLK5
(→input)
opcs –
CLK5
(→input)
Cancel
This page:
clock2 –
CLOCK_RESET_B
(→input)
clock2 –
CLOCK_RESET_B
(→input)
clock2 –
CLOCK_RESET_B
(→input)
clock2 –
CLOCK_RESET_B
(→input)
Other pages:
clock1 –
CLOCK_RESET_B
(→input)
clock1 –
CLOCK_RESET_B
(→input)
olord2 –
CLOCK_RESET_B
(output→)
olord2 –
CLOCK_RESET_B
(→input)
Cancel
This page:
clock2 – GND (→input)
clock2 – GND (→input)
clock2 – GND (→input)
clock2 – GND (→input)
clock2 – GND (→input)
clock2 – GND (→input)
clock2 – GND (→input)
clock2 – GND (→input)
clock2 – GND (→input)
clock2 – GND (→input)
clock2 – GND (→input)
clock2 – GND (→input)
clock2 – GND (→input)
clock2 – GND (→input)
clock2 – GND (→input)
clock2 – GND (→input)
clock2 – GND (→input)
Other pages:
actl – GND (→input)
actl – GND (→input)
actl – GND (→input)
actl – GND (→input)
actl – GND (→input)
actl – GND (→input)
actl – GND (→input)
actl – GND (→input)
alucry – GND (→input)
alucry – GND (→input)
alucry – GND (→input)
alucry – GND (→input)
alucry – GND (→input)
alucry – GND (→input)
alucry – GND (→input)
alucry – GND (→input)
alucry – GND (→input)
alucry – GND (→input)
alucry – GND (→input)
alucry – GND (→input)
aluc4 – GND (→input)
aluc4 – GND (→input)
aluc4 – GND (→input)
aluc4 – GND (→input)
aluc4 – GND (→input)
aluc4 – GND (→input)
aluc4 – GND (→input)
aluc4 – GND (→input)
aluc4 – GND (→input)
aluc4 – GND (→input)
aluc4 – GND (→input)
aluc4 – GND (→input)
amem1 – GND (→input)
amem1 – GND (→input)
amem0 – GND (→input)
amem0 – GND (→input)
apar – GND (→input)
apar – GND (→input)
clock1 – GND (→input)
clock1 – GND (→input)
dram0 – GND (→input)
dram1 – GND (→input)
flag – GND (→input)
flag – GND (→input)
dspctl – GND (→input)
dspctl – GND (→input)
ipar – GND (→input)
ipar – GND (→input)
ipar – GND (→input)
ipar – GND (→input)
ipar – GND (→input)
ipar – GND (→input)
ipar – GND (→input)
ireg – GND (→input)
iwrpar – GND (→input)
iwrpar – GND (→input)
iwrpar – GND (→input)
iwrpar – GND (→input)
iwrpar – GND (→input)
iwrpar – GND (→input)
iwrpar – GND (→input)
iwrpar – GND (→input)
iwr – GND (→input)
lc – GND (→input)
lc – GND (→input)
l – GND (→input)
l – GND (→input)
l – GND (→input)
lpc – GND (→input)
lpc – GND (→input)
lcc – GND (→input)
lcc – GND (→input)
lcc – GND (→input)
mbcpin – GND (output→)
mbcpin – GND (output→)
mbcpin – GND (output→)
md – GND (→input)
mctl – GND (→input)
mds – GND (→input)
mmem – GND (→input)
mmem – GND (→input)
mmem – GND (→input)
mmem – GND (→input)
mo1 – GND (→input)
mo1 – GND (→input)
mo0 – GND (→input)
mo0 – GND (→input)
npc – GND (→input)
npc – GND (→input)
npc – GND (→input)
npc – GND (→input)
npc – GND (→input)
npc – GND (→input)
npc – GND (→input)
npc – GND (→input)
npc – GND (→input)
npc – GND (→input)
npc – GND (→input)
npc – GND (→input)
npc – GND (→input)
npc – GND (→input)
npc – GND (→input)
npc – GND (→input)
npc – GND (→input)
mskg4 – GND (→input)
mskg4 – GND (→input)
olord2 – GND (→input)
olord2 – GND (→input)
olord2 – GND (→input)
olord2 – GND (→input)
olord2 – GND (→input)
olord1 – GND (→input)
olord1 – GND (→input)
opcs – GND (→input)
opcs – GND (→input)
opcs – GND (→input)
opcs – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
pdl0 – GND (→input)
pdl0 – GND (→input)
pctl – GND (→input)
pctl – GND (→input)
pctl – GND (→input)
pctl – GND (→input)
pctl – GND (→input)
pctl – GND (→input)
pctl – GND (→input)
pctl – GND (→input)
pctl – GND (→input)
pdlctl – GND (→input)
pdl1 – GND (→input)
pdl1 – GND (→input)
pdlptr – GND (→input)
pdlptr – GND (→input)
pdlptr – GND (→input)
pdlptr – GND (→input)
pdlptr – GND (→input)
shift1 – GND (→input)
shift1 – GND (→input)
shift0 – GND (→input)
shift0 – GND (→input)
smctl – GND (→input)
spc – GND (→input)
spc – GND (→input)
spc – GND (→input)
spc – GND (→input)
spc – GND (→input)
spc – GND (→input)
source – GND (→input)
spcpar – GND (→input)
spcpar – GND (→input)
spcpar – GND (→input)
spcpar – GND (→input)
spcpar – GND (→input)
spcpar – GND (→input)
spcpar – GND (→input)
spcpar – GND (→input)
spclch – GND (→input)
spclch – GND (→input)
spclch – GND (→input)
spclch – GND (→input)
spclch – GND (→input)
spclch – GND (→input)
spclch – GND (→input)
spclch – GND (→input)
spy0 – GND (→input)
spy0 – GND (→input)
spcw – GND (→input)
spcw – GND (→input)
spcw – GND (→input)
spcw – GND (→input)
spcw – GND (→input)
spcw – GND (→input)
stat – GND (→input)
stat – GND (→input)
spy4 – GND (→input)
spy4 – GND (→input)
spy4 – GND (→input)
spy4 – GND (→input)
vctl1 – GND (→input)
vctl1 – GND (→input)
trap – GND (→input)
trap – GND (→input)
vmem0 – GND (→input)
vmem0 – GND (→input)
vmem0 – GND (→input)
vmem0 – GND (→input)
vmem0 – GND (→input)
vmem0 – GND (→input)
vmem0 – GND (→input)
vmas – GND (→input)
vmas – GND (→input)
vmas – GND (→input)
vmas – GND (→input)
vmas – GND (→input)
vmas – GND (→input)
vmas – GND (→input)
vmas – GND (→input)
vmas – GND (→input)
vmas – GND (→input)
vmem2 – GND (→input)
vmem2 – GND (→input)
vmem2 – GND (→input)
vmem2 – GND (→input)
vmem1 – GND (→input)
vmem1 – GND (→input)
vmem1 – GND (→input)
vmem1 – GND (→input)
vmem1 – GND (→input)
vmem1 – GND (→input)
vmemdr – GND (→input)
vmemdr – GND (→input)
Cancel
This page:
clock2 – HI1 (→input)
Other pages:
clockd – HI1 (→input)
ictl – HI1 (→input)
ictl – HI1 (→input)
ictl – HI1 (→input)
olord2 – HI1 (→input)
olord2 – HI1 (→input)
olord2 – HI1 (→input)
olord2 – HI1 (→input)
olord2 – HI1 (→input)
olord2 – HI1 (output→)
spc – HI1 (output→)
spc – HI1 (→input)
spc – HI1 (→input)
spc – HI1 (→input)
spc – HI1 (→input)
spc – HI1 (→input)
spclch – HI1 (→input)
spy0 – HI1 (→input)
spy0 – HI1 (→input)
stat – HI1 (→input)
stat – HI1 (→input)
Cancel
This page:
clock2 – MACHRUN (→input)
Other pages:
mbcpin –
MACHRUN
(output→)
olord1 – MACHRUN (→input)
olord1 – MACHRUN (→input)
olord1 –
MACHRUN
(output→)
olord1 – MACHRUN (output→)
Cancel
This page:
clock2 – MACHRUNA_L (→input)
clock2 – MACHRUNA_L (→input)
Other pages:
Cancel
This page:
clock2 –
MCLK0
(→input)
clock2 –
MCLK0
(→input)
clock2 –
MCLK0
(→input)
clock2 –
MCLK0
(output→)
Other pages:
Cancel
This page:
clock2 – MCLK1 (output→)
Other pages:
clockd –
MCLK1
(→input)
clockd –
MCLK1
(output→)
clockd – MCLK1 (→input)
Cancel
This page:
clock2 – MCLK5 (output→)
Other pages:
olord2 –
MCLK5
(output→)
olord2 – MCLK5 (→input)
Cancel
This page:
clock2 – MCLK7 (output→)
Other pages:
mbcpin – MCLK7 (output→)
Cancel
This page:
clock2 –
TPCLK
(→input)
clock2 –
TPCLK
(→input)
clock2 – TPCLK (output→)
clock2 –
TPCLK
(output→)
Other pages:
Cancel
This page:
clock2 –
TPR0
(→input)
Other pages:
clock1 –
TPR0
(→input)
clock1 –
TPR0
(output→)
Cancel
This page:
clock2 –
TPR25
(→input)
Other pages:
clock1 –
TPR25
(output→)
Cancel
This page:
clock2 –
TPR5
(→input)
Other pages:
clock1 –
TPR5
(output→)
Cancel
This page:
clock2 –
TPREND
(→input)
clock2 –
TPREND
(→input)
Other pages:
clock1 –
TPREND
(→input)
clock1 – TPREND (output→)
clock1 –
TPREND
(output→)
Cancel
This page:
clock2 – TPTSE (→input)
clock2 – TPTSE (→input)
clock2 – TPTSE (→input)
clock2 – TPTSE (→input)
clock2 –
TPTSE
(output→)
clock2 – TPTSE (output→)
Other pages:
Cancel
This page:
clock2 –
TPW30
(→input)
Other pages:
clock1 –
TPW30
(output→)
Cancel
This page:
clock2 –
TPW45
(→input)
Other pages:
clock1 –
TPW45
(output→)
Cancel
This page:
clock2 –
TPW70
(→input)
Other pages:
clock1 –
TPW70
(output→)
Cancel
This page:
clock2 – TPWP (→input)
clock2 – TPWP (→input)
clock2 – TPWP (→input)
clock2 – TPWP (→input)
clock2 – TPWP (output→)
Other pages:
Cancel
This page:
clock2 – TPWPIRAM (→input)
clock2 – TPWPIRAM (output→)
Other pages:
Cancel
This page:
clock2 –
TSE1
(output→)
Other pages:
clockd –
TSE1
(→input)
Cancel
This page:
clock2 –
TSE2
(output→)
Other pages:
clockd – TSE2 (output→)
clockd –
TSE2
(→input)
md – TSE2 (→input)
qctl – TSE2 (→input)
qctl – TSE2 (→input)
vma – TSE2 (→input)
Cancel
This page:
clock2 –
TSE3
(output→)
Other pages:
clockd –
TSE3
(→input)
Cancel
This page:
clock2 –
TSE4
(output→)
Other pages:
clockd –
TSE4
(→input)
Cancel
This page:
clock2 –
WP1
(output→)
Other pages:
clockd –
WP1
(→input)
Cancel
This page:
clock2 –
WP2
(output→)
Other pages:
clockd – WP2 (output→)
clockd –
WP2
(→input)
dram0 – WP2 (→input)
dram2 – WP2 (→input)
dram1 – WP2 (→input)
Cancel
This page:
clock2 –
WP3
(output→)
Other pages:
clockd –
WP3
(→input)
Cancel
This page:
clock2 –
WP4
(output→)
Other pages:
clockd –
WP4
(→input)
Cancel
This page:
clock2 –
WP5
(output→)
Other pages:
ictl –
WP5
(→input)
Cancel