← aluc4 → amem0

CADR – ALU CARRY AND FUNCTION [alucry]

2C1074S022C1074S022C1074S022C1074S022C1574S002C1574S002D1574S322C1574S002C1574S002C2074S202C2074S202B1974282B1974282A20CARRY NET74S182XOUTYOUTX3Y3COUT2X2Y2COUT1X1Y1COUT0X0Y0CIN2A19CARRY NET74S182XOUTYOUTX3Y3COUT2X2Y2COUT1X1Y1COUT0X0Y0CIN2A18CARRY NET74S182XOUTYOUTX3Y3COUT2X2Y2COUT1X1Y1COUT0X0Y0CIN2B16SEL1SEL0OUTENB3210OUTENB3210DUAL 4-1SELECT74S1532B17SEL1SEL0OUTENB3210OUTENB3210DUAL 4-1SELECT74S1532B18SEL1SEL0OUTENB3210OUTENB3210DUAL 4-1SELECT74S1532A1774S372A1774S372A1774S372A1774S372A1674S372A1674S372A1674S372A1674S372C11HEX INV74S042B2074S37ALUMODEALUMODEIR0Instruction Register bit 1: ALU: Q control. 0 Do nothing; 1 Shift Q left, shifting in the inverse of the sign of the ALU output (ALU31); 2 shift Q right, shifting in the low bit of the ALU output (ALU0); 3 Load Q from ALU outputIR1Instruction Register bit 2: ALU: Carry this bit into the low end of the ALU.IR2IR3IR4A31A31BIR4IR3Instruction Register bit 2: ALU: Carry this bit into the low end of the ALU.IR2Instruction Register bit 1: ALU: Q control. 0 Do nothing; 1 Shift Q left, shifting in the inverse of the sign of the ALU output (ALU31); 2 shift Q right, shifting in the low bit of the ALU output (ALU0); 3 Load Q from ALU outputIR1IR0DIVPOSLASTTIMEInstruction Register bit 6: JUMP: Invert ConditionIR6Q0DIVSUBCONDDIVPOSLASTTIMEDIVDIVPOSLASTTIMEInstruction Register bit 5: JUMP: If low, rotation count for M source. If high, condition number.IR5DIVDIVADDCONDDIVADDCONDA31A31ADIVSUBCONDHI12MULALUADDMULNOPQ0MULDIVSUBCONDA31DIVADDCONDA31AInstruction Register contains a JUMP instruction (IR44-IR43).IRJUMPALUSUBGNDGNDHI12IR4GNDHI12GNDIR3Instruction Register bit 5: JUMP: If low, rotation count for M source. If high, condition number.IR5GNDHI12GNDInstruction Register bit 6: JUMP: Invert ConditionIR6HI12GNDGNDGNDHI12HI12Instruction Register bit 7: JUMP: N-Bit, NOPIR7OSEL0OSEL1Output Bus Control. With IR12. 1 ALU; 2 ALU shifted right by one bit, with the correct sign shifted in; 3 ALU shifted left by one bit, shifting in Q31 from the right.IR13Instruction Register contains an ALU instruction (IR44-IR43).IRALUOutput Bus Control. With IR13. 1 ALU; 2 ALU shifted right by one bit, with the correct sign shifted in; 3 ALU shifted left by one bit, shifting in Q31 from the right.IR12Instruction Register contains an ALU instruction (IR44-IR43).IRALUInstruction Register bit 2: ALU: Carry this bit into the low end of the ALU.IR2HI12Instruction Register contains a JUMP instruction (IR44-IR43).IRJUMPGNDCIN0NCNCNCNCNCNCNCALUF3ALUF2ALUF1ALUF0ALUF3ALUF2ALUF1ALUF0ALUF3AALUF2AALUF1AALUF0AALUF3BALUF2BALUF1BALUF0BALUMODEALUF1ALUF0ALUF2ALUF3GNDGNDALUSUBALUADDCIN16CIN32XX1YY1XX0YY0CIN0YY0XX0XX1YY1CIN28CIN24CIN20CIN16CIN12CIN8CIN4XOUT31YOUT31XOUT27YOUT27XOUT23YOUT23XOUT19YOUT19XOUT15YOUT15XOUT11YOUT11XOUT7YOUT7XOUT3YOUT3CIN06≡5≡4≡10≡9≡8≡3≡2≡1≡13≡12≡11≡2≡1≡3≡5≡4≡6≡5≡4≡6≡9≡10≡8≡12≡13≡11≡6≡1≡2≡4≡5≡8≡13≡12≡10≡9≡1≡2≡3≡4≡5≡6≡13:3:4:1:2:14:15:5:6:7:10:9:11:12:13:3:4:1:2:14:15:5:6:7:10:9:11:12:13:3:4:1:2:14:15:5:6:7:10:9:11:12:7:9:15:13:12:11:10:1:3:4:5:6:2:14:7:9:15:13:12:11:10:1:3:4:5:6:2:14:7:9:15:13:12:11:10:1:3:4:5:6:2:14:11≡12≡13≡8≡9≡10≡6≡5≡4≡3≡2≡1≡11≡12≡13≡8≡9≡10≡6≡5≡4≡3≡2≡1≡1≡3≡5≡9≡11≡13≡2≡4≡6≡8≡10≡12≡3≡2≡1≡

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