← alu1
→ alucry
CADR – ALU CARRY AND FUNCTION [aluc4]
Find File:
Find Pin:
2D21
7428
2D21
7428
2B20
74S37
2C11
HEX INV
74S04
2A16
74S37
2A16
74S37
2A16
74S37
2A16
74S37
2A17
74S37
2A17
74S37
2A17
74S37
2A17
74S37
2B18
SEL1
SEL0
OUT
ENB
3
2
1
0
OUT
ENB
3
2
1
0
DUAL 4-1
SELECT
74S153
2B17
SEL1
SEL0
OUT
ENB
3
2
1
0
OUT
ENB
3
2
1
0
DUAL 4-1
SELECT
74S153
2B16
SEL1
SEL0
OUT
ENB
3
2
1
0
OUT
ENB
3
2
1
0
DUAL 4-1
SELECT
74S153
2A18
CARRY NET
74S182
XOUT
YOUT
X3
Y3
COUT2
X2
Y2
COUT1
X1
Y1
COUT0
X0
Y0
CIN
2A19
CARRY NET
74S182
XOUT
YOUT
X3
Y3
COUT2
X2
Y2
COUT1
X1
Y1
COUT0
X0
Y0
CIN
2A20
CARRY NET
74S182
XOUT
YOUT
X3
Y3
COUT2
X2
Y2
COUT1
X1
Y1
COUT0
X0
Y0
CIN
2D21
7428
2D21
7428
2C20
74S20
2C20
74S20
2C15
74S00
2C15
74S00
2D15
74S32
2C15
74S00
2C15
74S00
2C10
74S02
2C10
74S02
2C10
74S02
2C10
74S02
Instruction Register contains an ALU instruction (IR44-IR43).
IRALU
Output Bus Control. With IR13. 1 ALU; 2 ALU shifted right by one bit, with the correct sign shifted in; 3 ALU shifted left by one bit, shifting in Q31 from the right.
IR12
Instruction Register contains an ALU instruction (IR44-IR43).
IRALU
Output Bus Control. With IR12. 1 ALU; 2 ALU shifted right by one bit, with the correct sign shifted in; 3 ALU shifted left by one bit, shifting in Q31 from the right.
IR13
OSEL1A
4≡
5≡
6≡
OSEL0A
1≡
2≡
3≡
ALUMODE
ALUMODE
IR0
Instruction Register bit 1: ALU: Q control. 0 Do nothing; 1 Shift Q left, shifting in the inverse of the sign of the ALU output (ALU31); 2 shift Q right, shifting in the low bit of the ALU output (ALU0); 3 Load Q from ALU output
IR1
Instruction Register bit 2: ALU: Carry this bit into the low end of the ALU.
IR2
IR3
IR4
A31
A31B
IR4
IR3
Instruction Register bit 2: ALU: Carry this bit into the low end of the ALU.
IR2
Instruction Register bit 1: ALU: Q control. 0 Do nothing; 1 Shift Q left, shifting in the inverse of the sign of the ALU output (ALU31); 2 shift Q right, shifting in the low bit of the ALU output (ALU0); 3 Load Q from ALU output
IR1
IR0
DIVPOSLASTTIME
Instruction Register bit 6: JUMP: Invert Condition
IR6
Q0
DIVSUBCOND
DIVPOSLASTTIME
DIV
DIVPOSLASTTIME
Instruction Register bit 5: JUMP: If low, rotation count for M source. If high, condition number.
IR5
DIV
DIVADDCOND
DIVADDCOND
A31
A31A
DIVSUBCOND
HI12
MUL
ALUADD
MULNOP
Q0
MUL
DIVSUBCOND
A31
DIVADDCOND
A31A
Instruction Register contains a JUMP instruction (IR44-IR43).
IRJUMP
ALUSUB
GND
GND
HI12
IR4
GND
HI12
GND
IR3
Instruction Register bit 5: JUMP: If low, rotation count for M source. If high, condition number.
IR5
GND
HI12
GND
Instruction Register bit 6: JUMP: Invert Condition
IR6
HI12
GND
GND
GND
HI12
HI12
Instruction Register bit 7: JUMP: N-Bit, NOP
IR7
OSEL0B
OSEL1B
Output Bus Control. With IR12. 1 ALU; 2 ALU shifted right by one bit, with the correct sign shifted in; 3 ALU shifted left by one bit, shifting in Q31 from the right.
IR13
Instruction Register contains an ALU instruction (IR44-IR43).
IRALU
Output Bus Control. With IR13. 1 ALU; 2 ALU shifted right by one bit, with the correct sign shifted in; 3 ALU shifted left by one bit, shifting in Q31 from the right.
IR12
Instruction Register contains an ALU instruction (IR44-IR43).
IRALU
Instruction Register bit 2: ALU: Carry this bit into the low end of the ALU.
IR2
HI12
Instruction Register contains a JUMP instruction (IR44-IR43).
IRJUMP
GND
CIN0
NC
NC
NC
NC
NC
NC
NC
ALUF3
ALUF2
ALUF1
ALUF0
ALUF3
ALUF2
ALUF1
ALUF0
ALUF3A
ALUF2A
ALUF1A
ALUF0A
ALUF3B
ALUF2B
ALUF1B
ALUF0B
ALUMODE
ALUF1
ALUF0
ALUF2
ALUF3
GND
GND
ALUSUB
ALUADD
CIN16
CIN32
XX1
YY1
XX0
YY0
CIN0
YY0
XX0
XX1
YY1
CIN28
CIN24
CIN20
CIN16
CIN12
CIN8
CIN4
XOUT31
YOUT31
XOUT27
YOUT27
XOUT23
YOUT23
XOUT19
YOUT19
XOUT15
YOUT15
XOUT11
YOUT11
XOUT7
YOUT7
XOUT3
YOUT3
CIN0
3≡
2≡
1≡
1≡
3≡
5≡
9≡
11≡
13≡
2≡
4≡
6≡
8≡
10≡
12≡
3≡
2≡
1≡
6≡
5≡
4≡
8≡
9≡
10≡
11≡
12≡
13≡
3≡
2≡
1≡
6≡
5≡
4≡
8≡
9≡
10≡
11≡
12≡
13≡
7:
9:
15:
13:
12:
11:
10:
1:
3:
4:
5:
6:
2:
14:
7:
9:
15:
13:
12:
11:
10:
1:
3:
4:
5:
6:
2:
14:
7:
9:
15:
13:
12:
11:
10:
1:
3:
4:
5:
6:
2:
14:
13:
3:
4:
1:
2:
14:
15:
5:
6:
7:
10:
9:
11:
12:
13:
3:
4:
1:
2:
14:
15:
5:
6:
7:
10:
9:
11:
12:
13:
3:
4:
1:
2:
14:
15:
5:
6:
7:
10:
9:
11:
12:
10≡
9≡
8≡
13≡
12≡
11≡
8≡
13≡
12≡
10≡
9≡
6≡
1≡
2≡
4≡
5≡
12≡
13≡
11≡
9≡
10≡
8≡
5≡
4≡
6≡
5≡
4≡
6≡
2≡
1≡
3≡
13≡
12≡
11≡
3≡
2≡
1≡
10≡
9≡
8≡
6≡
5≡
4≡
This page:
aluc4 –
A31
(output→)
aluc4 –
A31
(→input)
aluc4 –
A31
(→input)
Other pages:
alucry –
A31
(output→)
alucry –
A31
(→input)
alucry –
A31
(→input)
Cancel
This page:
aluc4 – A31A (→input)
aluc4 – A31A (→input)
Other pages:
alatch – A31A (output→)
alatch – A31A (output→)
alu1 – A31A (→input)
alucry – A31A (→input)
alucry – A31A (→input)
spy2 – A31A (→input)
Cancel
This page:
aluc4 – A31B (→input)
Other pages:
alatch – A31B (output→)
alatch – A31B (output→)
alu1 – A31B (→input)
alucry – A31B (→input)
apar – A31B (→input)
mo1 – A31B (→input)
Cancel
This page:
aluc4 – ALUADD (output→)
aluc4 – ALUADD (→input)
Other pages:
alucry – ALUADD (output→)
alucry – ALUADD (→input)
Cancel
This page:
aluc4 –
ALUF0
(→input)
aluc4 –
ALUF0
(→input)
aluc4 –
ALUF0
(output→)
Other pages:
alucry –
ALUF0
(→input)
alucry –
ALUF0
(→input)
alucry –
ALUF0
(output→)
Cancel
This page:
aluc4 – ALUF0A (output→)
Other pages:
alu1 – ALUF0A (→input)
alucry – ALUF0A (output→)
Cancel
This page:
aluc4 – ALUF0B (output→)
Other pages:
alu0 – ALUF0B (→input)
alucry – ALUF0B (output→)
Cancel
This page:
aluc4 –
ALUF1
(→input)
aluc4 –
ALUF1
(→input)
aluc4 –
ALUF1
(output→)
Other pages:
alucry –
ALUF1
(→input)
alucry –
ALUF1
(→input)
alucry –
ALUF1
(output→)
Cancel
This page:
aluc4 – ALUF1A (output→)
Other pages:
alu1 – ALUF1A (→input)
alucry – ALUF1A (output→)
Cancel
This page:
aluc4 – ALUF1B (output→)
Other pages:
alu0 – ALUF1B (→input)
alucry – ALUF1B (output→)
Cancel
This page:
aluc4 –
ALUF2
(→input)
aluc4 –
ALUF2
(→input)
aluc4 –
ALUF2
(output→)
Other pages:
alucry –
ALUF2
(→input)
alucry –
ALUF2
(→input)
alucry –
ALUF2
(output→)
Cancel
This page:
aluc4 – ALUF2A (output→)
Other pages:
alu1 – ALUF2A (→input)
alucry – ALUF2A (output→)
Cancel
This page:
aluc4 – ALUF2B (output→)
Other pages:
alu0 – ALUF2B (→input)
alucry – ALUF2B (output→)
Cancel
This page:
aluc4 –
ALUF3
(→input)
aluc4 –
ALUF3
(→input)
aluc4 –
ALUF3
(output→)
Other pages:
alucry –
ALUF3
(→input)
alucry –
ALUF3
(→input)
alucry –
ALUF3
(output→)
Cancel
This page:
aluc4 – ALUF3A (output→)
Other pages:
alu1 – ALUF3A (→input)
alucry – ALUF3A (output→)
Cancel
This page:
aluc4 – ALUF3B (output→)
Other pages:
alu0 – ALUF3B (→input)
alucry – ALUF3B (output→)
Cancel
This page:
aluc4 – ALUMODE (output→)
aluc4 –
ALUMODE
(→input)
aluc4 –
ALUMODE
(output→)
Other pages:
alu1 – ALUMODE (→input)
alu0 – ALUMODE (→input)
alucry – ALUMODE (output→)
alucry –
ALUMODE
(→input)
alucry –
ALUMODE
(output→)
Cancel
This page:
aluc4 – ALUSUB (output→)
aluc4 – ALUSUB (→input)
Other pages:
alucry – ALUSUB (output→)
alucry – ALUSUB (→input)
Cancel
This page:
aluc4 –
CIN0
(output→)
aluc4 –
CIN0
(→input)
aluc4 –
CIN0
(→input)
Other pages:
alu0 –
CIN0
(→input)
alucry –
CIN0
(output→)
alucry –
CIN0
(→input)
alucry –
CIN0
(→input)
Cancel
This page:
aluc4 –
CIN12
(output→)
Other pages:
alu0 –
CIN12
(→input)
alucry –
CIN12
(output→)
Cancel
This page:
aluc4 –
CIN16
(output→)
aluc4 –
CIN16
(→input)
Other pages:
alu1 –
CIN16
(→input)
alucry –
CIN16
(output→)
alucry –
CIN16
(→input)
Cancel
This page:
aluc4 –
CIN20
(output→)
Other pages:
alu1 –
CIN20
(→input)
alucry –
CIN20
(output→)
Cancel
This page:
aluc4 –
CIN24
(output→)
Other pages:
alu1 –
CIN24
(→input)
alucry –
CIN24
(output→)
Cancel
This page:
aluc4 –
CIN28
(output→)
Other pages:
alu1 –
CIN28
(→input)
alucry –
CIN28
(output→)
Cancel
This page:
aluc4 –
CIN32
(output→)
Other pages:
alu1 –
CIN32
(→input)
alucry –
CIN32
(output→)
Cancel
This page:
aluc4 –
CIN4
(output→)
Other pages:
alu0 –
CIN4
(→input)
alucry –
CIN4
(output→)
Cancel
This page:
aluc4 –
CIN8
(output→)
Other pages:
alu0 –
CIN8
(→input)
alucry –
CIN8
(output→)
Cancel
This page:
aluc4 –
DIV
(→input)
aluc4 –
DIV
(→input)
Other pages:
alucry –
DIV
(→input)
alucry –
DIV
(→input)
source –
DIV
(output→)
Cancel
This page:
aluc4 – DIVADDCOND (output→)
aluc4 – DIVADDCOND (→input)
aluc4 – DIVADDCOND (→input)
Other pages:
alucry – DIVADDCOND (output→)
alucry – DIVADDCOND (→input)
alucry – DIVADDCOND (→input)
Cancel
This page:
aluc4 –
DIVPOSLASTTIME
(output→)
aluc4 –
DIVPOSLASTTIME
(→input)
aluc4 –
DIVPOSLASTTIME
(→input)
Other pages:
alucry –
DIVPOSLASTTIME
(output→)
alucry –
DIVPOSLASTTIME
(→input)
alucry –
DIVPOSLASTTIME
(→input)
Cancel
This page:
aluc4 – DIVSUBCOND (output→)
aluc4 – DIVSUBCOND (→input)
aluc4 – DIVSUBCOND (→input)
Other pages:
alucry – DIVSUBCOND (output→)
alucry – DIVSUBCOND (→input)
alucry – DIVSUBCOND (→input)
Cancel
This page:
aluc4 – GND (→input)
aluc4 – GND (→input)
aluc4 – GND (→input)
aluc4 – GND (→input)
aluc4 – GND (→input)
aluc4 – GND (→input)
aluc4 – GND (→input)
aluc4 – GND (→input)
aluc4 – GND (→input)
aluc4 – GND (→input)
aluc4 – GND (→input)
aluc4 – GND (→input)
Other pages:
actl – GND (→input)
actl – GND (→input)
actl – GND (→input)
actl – GND (→input)
actl – GND (→input)
actl – GND (→input)
actl – GND (→input)
actl – GND (→input)
alucry – GND (→input)
alucry – GND (→input)
alucry – GND (→input)
alucry – GND (→input)
alucry – GND (→input)
alucry – GND (→input)
alucry – GND (→input)
alucry – GND (→input)
alucry – GND (→input)
alucry – GND (→input)
alucry – GND (→input)
alucry – GND (→input)
amem1 – GND (→input)
amem1 – GND (→input)
amem0 – GND (→input)
amem0 – GND (→input)
apar – GND (→input)
apar – GND (→input)
clock1 – GND (→input)
clock1 – GND (→input)
clock2 – GND (→input)
clock2 – GND (→input)
clock2 – GND (→input)
clock2 – GND (→input)
clock2 – GND (→input)
clock2 – GND (→input)
clock2 – GND (→input)
clock2 – GND (→input)
clock2 – GND (→input)
clock2 – GND (→input)
clock2 – GND (→input)
clock2 – GND (→input)
clock2 – GND (→input)
clock2 – GND (→input)
clock2 – GND (→input)
clock2 – GND (→input)
clock2 – GND (→input)
dram0 – GND (→input)
dram1 – GND (→input)
flag – GND (→input)
flag – GND (→input)
dspctl – GND (→input)
dspctl – GND (→input)
ipar – GND (→input)
ipar – GND (→input)
ipar – GND (→input)
ipar – GND (→input)
ipar – GND (→input)
ipar – GND (→input)
ipar – GND (→input)
ireg – GND (→input)
iwrpar – GND (→input)
iwrpar – GND (→input)
iwrpar – GND (→input)
iwrpar – GND (→input)
iwrpar – GND (→input)
iwrpar – GND (→input)
iwrpar – GND (→input)
iwrpar – GND (→input)
iwr – GND (→input)
lc – GND (→input)
lc – GND (→input)
l – GND (→input)
l – GND (→input)
l – GND (→input)
lpc – GND (→input)
lpc – GND (→input)
lcc – GND (→input)
lcc – GND (→input)
lcc – GND (→input)
mbcpin – GND (output→)
mbcpin – GND (output→)
mbcpin – GND (output→)
md – GND (→input)
mctl – GND (→input)
mds – GND (→input)
mmem – GND (→input)
mmem – GND (→input)
mmem – GND (→input)
mmem – GND (→input)
mo1 – GND (→input)
mo1 – GND (→input)
mo0 – GND (→input)
mo0 – GND (→input)
npc – GND (→input)
npc – GND (→input)
npc – GND (→input)
npc – GND (→input)
npc – GND (→input)
npc – GND (→input)
npc – GND (→input)
npc – GND (→input)
npc – GND (→input)
npc – GND (→input)
npc – GND (→input)
npc – GND (→input)
npc – GND (→input)
npc – GND (→input)
npc – GND (→input)
npc – GND (→input)
npc – GND (→input)
mskg4 – GND (→input)
mskg4 – GND (→input)
olord2 – GND (→input)
olord2 – GND (→input)
olord2 – GND (→input)
olord2 – GND (→input)
olord2 – GND (→input)
olord1 – GND (→input)
olord1 – GND (→input)
opcs – GND (→input)
opcs – GND (→input)
opcs – GND (→input)
opcs – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
pdl0 – GND (→input)
pdl0 – GND (→input)
pctl – GND (→input)
pctl – GND (→input)
pctl – GND (→input)
pctl – GND (→input)
pctl – GND (→input)
pctl – GND (→input)
pctl – GND (→input)
pctl – GND (→input)
pctl – GND (→input)
pdlctl – GND (→input)
pdl1 – GND (→input)
pdl1 – GND (→input)
pdlptr – GND (→input)
pdlptr – GND (→input)
pdlptr – GND (→input)
pdlptr – GND (→input)
pdlptr – GND (→input)
shift1 – GND (→input)
shift1 – GND (→input)
shift0 – GND (→input)
shift0 – GND (→input)
smctl – GND (→input)
spc – GND (→input)
spc – GND (→input)
spc – GND (→input)
spc – GND (→input)
spc – GND (→input)
spc – GND (→input)
source – GND (→input)
spcpar – GND (→input)
spcpar – GND (→input)
spcpar – GND (→input)
spcpar – GND (→input)
spcpar – GND (→input)
spcpar – GND (→input)
spcpar – GND (→input)
spcpar – GND (→input)
spclch – GND (→input)
spclch – GND (→input)
spclch – GND (→input)
spclch – GND (→input)
spclch – GND (→input)
spclch – GND (→input)
spclch – GND (→input)
spclch – GND (→input)
spy0 – GND (→input)
spy0 – GND (→input)
spcw – GND (→input)
spcw – GND (→input)
spcw – GND (→input)
spcw – GND (→input)
spcw – GND (→input)
spcw – GND (→input)
stat – GND (→input)
stat – GND (→input)
spy4 – GND (→input)
spy4 – GND (→input)
spy4 – GND (→input)
spy4 – GND (→input)
vctl1 – GND (→input)
vctl1 – GND (→input)
trap – GND (→input)
trap – GND (→input)
vmem0 – GND (→input)
vmem0 – GND (→input)
vmem0 – GND (→input)
vmem0 – GND (→input)
vmem0 – GND (→input)
vmem0 – GND (→input)
vmem0 – GND (→input)
vmas – GND (→input)
vmas – GND (→input)
vmas – GND (→input)
vmas – GND (→input)
vmas – GND (→input)
vmas – GND (→input)
vmas – GND (→input)
vmas – GND (→input)
vmas – GND (→input)
vmas – GND (→input)
vmem2 – GND (→input)
vmem2 – GND (→input)
vmem2 – GND (→input)
vmem2 – GND (→input)
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