← spcpar
→ spy0
CADR – SPC WRITE DATA SEL [spcw]
Find File:
Find Pin:
4E14
QUAD 2 IN
SELECT
74S157
0
1
0
1
0
1
0
1
ENB
SEL
4E13
QUAD 2 IN
SELECT
74S157
0
1
0
1
0
1
0
1
ENB
SEL
4E12
QUAD 2 IN
SELECT
74S157
0
1
0
1
0
1
0
1
ENB
SEL
4E11
QUAD 2 IN
SELECT
74S157
0
1
0
1
0
1
0
1
ENB
SEL
4F15
QUAD 2 IN
SELECT
74S157
0
1
0
1
0
1
0
1
ENB
SEL
4F14
QUAD 2 IN
SEL-D FF
25S09
0
1
0
1
0
1
0
1
CLK↑
SEL
4F13
QUAD 2 IN
SEL-D FF
25S09
0
1
0
1
0
1
0
1
CLK↑
SEL
4F12
QUAD 2 IN
SEL-D FF
25S09
0
1
0
1
0
1
0
1
CLK↑
SEL
4F11
QUAD 2 IN
SEL-D FF
25S09
0
1
0
1
0
1
0
1
CLK↑
SEL
Destination SPC delayed. Set in the clock cycle after DESTSPC was set.
DESTSPCD
GND
NC
GND
GND
GND
GND
GND
Return Address. The PC value of either the next or the current instruction that could be written to the SPC stack.
RETA13
Return Address. The PC value of either the next or the current instruction that could be written to the SPC stack.
RETA12
Return Address. The PC value of either the next or the current instruction that could be written to the SPC stack.
RETA11
Return Address. The PC value of either the next or the current instruction that could be written to the SPC stack.
RETA10
Return Address. The PC value of either the next or the current instruction that could be written to the SPC stack.
RETA9
Return Address. The PC value of either the next or the current instruction that could be written to the SPC stack.
RETA8
Return Address. The PC value of either the next or the current instruction that could be written to the SPC stack.
RETA7
Return Address. The PC value of either the next or the current instruction that could be written to the SPC stack.
RETA6
Return Address. The PC value of either the next or the current instruction that could be written to the SPC stack.
RETA5
Return Address. The PC value of either the next or the current instruction that could be written to the SPC stack.
RETA4
Return Address. The PC value of either the next or the current instruction that could be written to the SPC stack.
RETA3
Return Address. The PC value of either the next or the current instruction that could be written to the SPC stack.
RETA2
Return Address. The PC value of either the next or the current instruction that could be written to the SPC stack.
RETA1
Return Address. The PC value of either the next or the current instruction that could be written to the SPC stack.
RETA0
NC
L18
L17
L16
L15
L14
L13
L12
L11
L10
L9
L8
L7
L6
L5
L4
L3
L2
L1
L0
NC
SPC Write. The PC value that is written to the SPC stack.
SPCW18
SPC Write. The PC value that is written to the SPC stack.
SPCW17
SPC Write. The PC value that is written to the SPC stack.
SPCW16
SPC Write. The PC value that is written to the SPC stack.
SPCW15
SPC Write. The PC value that is written to the SPC stack.
SPCW14
SPC Write. The PC value that is written to the SPC stack.
SPCW13
SPC Write. The PC value that is written to the SPC stack.
SPCW12
SPC Write. The PC value that is written to the SPC stack.
SPCW11
SPC Write. The PC value that is written to the SPC stack.
SPCW10
SPC Write. The PC value that is written to the SPC stack.
SPCW9
SPC Write. The PC value that is written to the SPC stack.
SPCW8
SPC Write. The PC value that is written to the SPC stack.
SPCW7
SPC Write. The PC value that is written to the SPC stack.
SPCW6
SPC Write. The PC value that is written to the SPC stack.
SPCW5
SPC Write. The PC value that is written to the SPC stack.
SPCW4
SPC Write. The PC value that is written to the SPC stack.
SPCW3
SPC Write. The PC value that is written to the SPC stack.
SPCW2
SPC Write. The PC value that is written to the SPC stack.
SPCW1
SPC Write. The PC value that is written to the SPC stack.
SPCW0
Next instruction will be NOPed.
N
CLK4D
NC
NC
Return Address. The PC value of either the next or the current instruction that could be written to the SPC stack.
RETA13
Return Address. The PC value of either the next or the current instruction that could be written to the SPC stack.
RETA12
Return Address. The PC value of either the next or the current instruction that could be written to the SPC stack.
RETA11
Return Address. The PC value of either the next or the current instruction that could be written to the SPC stack.
RETA10
Return Address. The PC value of either the next or the current instruction that could be written to the SPC stack.
RETA9
Return Address. The PC value of either the next or the current instruction that could be written to the SPC stack.
RETA8
Return Address. The PC value of either the next or the current instruction that could be written to the SPC stack.
RETA7
Return Address. The PC value of either the next or the current instruction that could be written to the SPC stack.
RETA6
Return Address. The PC value of either the next or the current instruction that could be written to the SPC stack.
RETA5
Return Address. The PC value of either the next or the current instruction that could be written to the SPC stack.
RETA4
Return Address. The PC value of either the next or the current instruction that could be written to the SPC stack.
RETA3
Return Address. The PC value of either the next or the current instruction that could be written to the SPC stack.
RETA2
Return Address. The PC value of either the next or the current instruction that could be written to the SPC stack.
RETA1
Return Address. The PC value of either the next or the current instruction that could be written to the SPC stack.
RETA0
NC
NC
Write PC. The PC that could be written to the SPC stack.
WPC13
Write PC. The PC that could be written to the SPC stack.
WPC12
Write PC. The PC that could be written to the SPC stack.
WPC11
Write PC. The PC that could be written to the SPC stack.
WPC10
Write PC. The PC that could be written to the SPC stack.
WPC9
Write PC. The PC that could be written to the SPC stack.
WPC8
Write PC. The PC that could be written to the SPC stack.
WPC7
Write PC. The PC that could be written to the SPC stack.
WPC6
Write PC. The PC that could be written to the SPC stack.
WPC5
Write PC. The PC that could be written to the SPC stack.
WPC4
Write PC. The PC that could be written to the SPC stack.
WPC3
Write PC. The PC that could be written to the SPC stack.
WPC2
Write PC. The PC that could be written to the SPC stack.
WPC1
Write PC. The PC that could be written to the SPC stack.
WPC0
NC
NC
Incremented PC
IPC13
Incremented PC
IPC12
Incremented PC
IPC11
Incremented PC
IPC10
Incremented PC
IPC9
Incremented PC
IPC8
Incremented PC
IPC7
Incremented PC
IPC6
Incremented PC
IPC5
Incremented PC
IPC4
Incremented PC
IPC3
Incremented PC
IPC2
Incremented PC
IPC1
Incremented PC
IPC0
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9:
This page:
spcw – CLK4D (→input)
Other pages:
clockd –
CLK4D
(→input)
clockd –
CLK4D
(→input)
clockd – CLK4D (output→)
clockd –
CLK4D
(→input)
clockd –
CLK4D
(output→)
spclch – CLK4D (→input)
Cancel
This page:
spcw – DESTSPCD (→input)
Other pages:
contrl – DESTSPCD (output→)
contrl –
DESTSPCD
(→input)
pdlctl –
DESTSPCD
(output→)
spy2 – DESTSPCD (→input)
Cancel
This page:
spcw – GND (→input)
spcw – GND (→input)
spcw – GND (→input)
spcw – GND (→input)
spcw – GND (→input)
spcw – GND (→input)
Other pages:
actl – GND (→input)
actl – GND (→input)
actl – GND (→input)
actl – GND (→input)
actl – GND (→input)
actl – GND (→input)
actl – GND (→input)
actl – GND (→input)
alucry – GND (→input)
alucry – GND (→input)
alucry – GND (→input)
alucry – GND (→input)
alucry – GND (→input)
alucry – GND (→input)
alucry – GND (→input)
alucry – GND (→input)
alucry – GND (→input)
alucry – GND (→input)
alucry – GND (→input)
alucry – GND (→input)
aluc4 – GND (→input)
aluc4 – GND (→input)
aluc4 – GND (→input)
aluc4 – GND (→input)
aluc4 – GND (→input)
aluc4 – GND (→input)
aluc4 – GND (→input)
aluc4 – GND (→input)
aluc4 – GND (→input)
aluc4 – GND (→input)
aluc4 – GND (→input)
aluc4 – GND (→input)
amem1 – GND (→input)
amem1 – GND (→input)
amem0 – GND (→input)
amem0 – GND (→input)
apar – GND (→input)
apar – GND (→input)
clock1 – GND (→input)
clock1 – GND (→input)
clock2 – GND (→input)
clock2 – GND (→input)
clock2 – GND (→input)
clock2 – GND (→input)
clock2 – GND (→input)
clock2 – GND (→input)
clock2 – GND (→input)
clock2 – GND (→input)
clock2 – GND (→input)
clock2 – GND (→input)
clock2 – GND (→input)
clock2 – GND (→input)
clock2 – GND (→input)
clock2 – GND (→input)
clock2 – GND (→input)
clock2 – GND (→input)
clock2 – GND (→input)
dram0 – GND (→input)
dram1 – GND (→input)
flag – GND (→input)
flag – GND (→input)
dspctl – GND (→input)
dspctl – GND (→input)
ipar – GND (→input)
ipar – GND (→input)
ipar – GND (→input)
ipar – GND (→input)
ipar – GND (→input)
ipar – GND (→input)
ipar – GND (→input)
ireg – GND (→input)
iwrpar – GND (→input)
iwrpar – GND (→input)
iwrpar – GND (→input)
iwrpar – GND (→input)
iwrpar – GND (→input)
iwrpar – GND (→input)
iwrpar – GND (→input)
iwrpar – GND (→input)
iwr – GND (→input)
lc – GND (→input)
lc – GND (→input)
l – GND (→input)
l – GND (→input)
l – GND (→input)
lpc – GND (→input)
lpc – GND (→input)
lcc – GND (→input)
lcc – GND (→input)
lcc – GND (→input)
mbcpin – GND (output→)
mbcpin – GND (output→)
mbcpin – GND (output→)
md – GND (→input)
mctl – GND (→input)
mds – GND (→input)
mmem – GND (→input)
mmem – GND (→input)
mmem – GND (→input)
mmem – GND (→input)
mo1 – GND (→input)
mo1 – GND (→input)
mo0 – GND (→input)
mo0 – GND (→input)
npc – GND (→input)
npc – GND (→input)
npc – GND (→input)
npc – GND (→input)
npc – GND (→input)
npc – GND (→input)
npc – GND (→input)
npc – GND (→input)
npc – GND (→input)
npc – GND (→input)
npc – GND (→input)
npc – GND (→input)
npc – GND (→input)
npc – GND (→input)
npc – GND (→input)
npc – GND (→input)
npc – GND (→input)
mskg4 – GND (→input)
mskg4 – GND (→input)
olord2 – GND (→input)
olord2 – GND (→input)
olord2 – GND (→input)
olord2 – GND (→input)
olord2 – GND (→input)
olord1 – GND (→input)
olord1 – GND (→input)
opcs – GND (→input)
opcs – GND (→input)
opcs – GND (→input)
opcs – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
opcd – GND (→input)
pdl0 – GND (→input)
pdl0 – GND (→input)
pctl – GND (→input)
pctl – GND (→input)
pctl – GND (→input)
pctl – GND (→input)
pctl – GND (→input)
pctl – GND (→input)
pctl – GND (→input)
pctl – GND (→input)
pctl – GND (→input)
pdlctl – GND (→input)
pdl1 – GND (→input)
pdl1 – GND (→input)
pdlptr – GND (→input)
pdlptr – GND (→input)
pdlptr – GND (→input)
pdlptr – GND (→input)
pdlptr – GND (→input)
shift1 – GND (→input)
shift1 – GND (→input)
shift0 – GND (→input)
shift0 – GND (→input)
smctl – GND (→input)
spc – GND (→input)
spc – GND (→input)
spc – GND (→input)
spc – GND (→input)
spc – GND (→input)
spc – GND (→input)
source – GND (→input)
spcpar – GND (→input)
spcpar – GND (→input)
spcpar – GND (→input)
spcpar – GND (→input)
spcpar – GND (→input)
spcpar – GND (→input)
spcpar – GND (→input)
spcpar – GND (→input)
spclch – GND (→input)
spclch – GND (→input)
spclch – GND (→input)
spclch – GND (→input)
spclch – GND (→input)
spclch – GND (→input)
spclch – GND (→input)
spclch – GND (→input)
spy0 – GND (→input)
spy0 – GND (→input)
stat – GND (→input)
stat – GND (→input)
spy4 – GND (→input)
spy4 – GND (→input)
spy4 – GND (→input)
spy4 – GND (→input)
vctl1 – GND (→input)
vctl1 – GND (→input)
trap – GND (→input)
trap – GND (→input)
vmem0 – GND (→input)
vmem0 – GND (→input)
vmem0 – GND (→input)
vmem0 – GND (→input)
vmem0 – GND (→input)
vmem0 – GND (→input)
vmem0 – GND (→input)
vmas – GND (→input)
vmas – GND (→input)
vmas – GND (→input)
vmas – GND (→input)
vmas – GND (→input)
vmas – GND (→input)
vmas – GND (→input)
vmas – GND (→input)
vmas – GND (→input)
vmas – GND (→input)
vmem2 – GND (→input)
vmem2 – GND (→input)
vmem2 – GND (→input)
vmem2 – GND (→input)
vmem1 – GND (→input)
vmem1 – GND (→input)
vmem1 – GND (→input)
vmem1 – GND (→input)
vmem1 – GND (→input)
vmem1 – GND (→input)
vmemdr – GND (→input)
vmemdr – GND (→input)
Cancel
This page:
spcw – IPC0 (→input)
Other pages:
npc – IPC0 (output→)
npc – IPC0 (→input)
Cancel
This page:
spcw – IPC1 (→input)
Other pages:
npc – IPC1 (output→)
npc – IPC1 (→input)
Cancel
This page:
spcw – IPC10 (→input)
Other pages:
npc – IPC10 (output→)
npc – IPC10 (→input)
Cancel
This page:
spcw – IPC11 (→input)
Other pages:
npc – IPC11 (output→)
npc – IPC11 (→input)
Cancel
This page:
spcw – IPC12 (→input)
Other pages:
npc – IPC12 (output→)
npc – IPC12 (→input)
Cancel
This page:
spcw – IPC13 (→input)
Other pages:
npc – IPC13 (output→)
npc – IPC13 (→input)
Cancel
This page:
spcw – IPC2 (→input)
Other pages:
npc – IPC2 (output→)
npc – IPC2 (→input)
Cancel
This page:
spcw – IPC3 (→input)
Other pages:
npc – IPC3 (output→)
npc – IPC3 (→input)
Cancel
This page:
spcw – IPC4 (→input)
Other pages:
npc – IPC4 (output→)
npc – IPC4 (→input)
Cancel
This page:
spcw – IPC5 (→input)
Other pages:
npc – IPC5 (output→)
npc – IPC5 (→input)
Cancel
This page:
spcw – IPC6 (→input)
Other pages:
npc – IPC6 (output→)
npc – IPC6 (→input)
Cancel
This page:
spcw – IPC7 (→input)
Other pages:
npc – IPC7 (output→)
npc – IPC7 (→input)
Cancel
This page:
spcw – IPC8 (→input)
Other pages:
npc – IPC8 (output→)
npc – IPC8 (→input)
Cancel
This page:
spcw – IPC9 (→input)
Other pages:
npc – IPC9 (output→)
npc – IPC9 (→input)
Cancel
This page:
spcw – L0 (→input)
Other pages:
alatch – L0 (→input)
amem1 – L0 (→input)
l – L0 (→input)
l – L0 (output→)
mmem – L0 (→input)
mlatch – L0 (→input)
pdl1 – L0 (→input)
Cancel
This page:
spcw – L1 (→input)
Other pages:
alatch – L1 (→input)
amem1 – L1 (→input)
l – L1 (→input)
l – L1 (output→)
mmem – L1 (→input)
mlatch – L1 (→input)
pdl1 – L1 (→input)
Cancel
This page:
spcw – L10 (→input)
Other pages:
alatch – L10 (→input)
amem1 – L10 (→input)
l – L10 (→input)
l – L10 (output→)
mmem – L10 (→input)
mlatch – L10 (→input)
pdl1 – L10 (→input)
Cancel
This page:
spcw – L11 (→input)
Other pages:
alatch – L11 (→input)
amem1 – L11 (→input)
l – L11 (→input)
l – L11 (output→)
mmem – L11 (→input)
mlatch – L11 (→input)
pdl1 – L11 (→input)
Cancel
This page:
spcw – L12 (→input)
Other pages:
alatch – L12 (→input)
amem1 – L12 (→input)
l – L12 (→input)
l – L12 (output→)
mmem – L12 (→input)
mlatch – L12 (→input)
pdl1 – L12 (→input)
Cancel
This page:
spcw – L13 (→input)
Other pages:
alatch – L13 (→input)
amem1 – L13 (→input)
l – L13 (→input)
l – L13 (output→)
mmem – L13 (→input)
mlatch – L13 (→input)
pdl1 – L13 (→input)
Cancel
This page:
spcw – L14 (→input)
Other pages:
alatch – L14 (→input)
amem1 – L14 (→input)
l – L14 (→input)
l – L14 (output→)
mmem – L14 (→input)
mlatch – L14 (→input)
pdl1 – L14 (→input)
Cancel
This page:
spcw – L15 (→input)
Other pages:
alatch – L15 (→input)
amem1 – L15 (→input)
l – L15 (→input)
l – L15 (output→)
mmem – L15 (→input)
mlatch – L15 (→input)
pdl1 – L15 (→input)
Cancel
This page:
spcw – L16 (→input)
Other pages:
alatch – L16 (→input)
amem0 – L16 (→input)
l – L16 (→input)
l – L16 (output→)
mmem – L16 (→input)
mlatch – L16 (→input)
pdl0 – L16 (→input)
Cancel
This page:
spcw – L17 (→input)
Other pages:
alatch – L17 (→input)
amem0 – L17 (→input)
l – L17 (→input)
l – L17 (output→)
mmem – L17 (→input)
mlatch – L17 (→input)
pdl0 – L17 (→input)
Cancel
This page:
spcw – L18 (→input)
Other pages:
alatch – L18 (→input)
amem0 – L18 (→input)
l – L18 (→input)
l – L18 (output→)
mmem – L18 (→input)
mlatch – L18 (→input)
pdl0 – L18 (→input)
Cancel
This page:
spcw – L2 (→input)
Other pages:
alatch – L2 (→input)
amem1 – L2 (→input)
l – L2 (→input)
l – L2 (output→)
mmem – L2 (→input)
mlatch – L2 (→input)
pdl1 – L2 (→input)
Cancel
This page:
spcw – L3 (→input)
Other pages:
alatch – L3 (→input)
amem1 – L3 (→input)
l – L3 (→input)
l – L3 (output→)
mmem – L3 (→input)
mlatch – L3 (→input)
pdl1 – L3 (→input)
Cancel
This page:
spcw – L4 (→input)
Other pages:
alatch – L4 (→input)
amem1 – L4 (→input)
l – L4 (→input)
l – L4 (output→)
mmem – L4 (→input)
mlatch – L4 (→input)
pdl1 – L4 (→input)
Cancel
This page:
spcw – L5 (→input)
Other pages:
alatch – L5 (→input)
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clockd – NC (→input)
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dspctl – NC (output→)
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ipar – NC (output→)
ireg – NC (→input)
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lpc – NC (output→)
lcc – NC (output→)
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lcc – NC (→input)
mcpins – NC (output→)
mcpins – NC (output→)
mcpins – NC (output→)
mcpins – NC (output→)
mcpins – NC (output→)
mcpins – NC (output→)
mbcpin – NC (output→)
mbcpin – NC (output→)
mbcpin – NC (output→)
mbcpin – NC (output→)
mbcpin – NC (output→)
mbcpin – NC (output→)
mbcpin – NC (output→)
mbcpin – NC (output→)
mbcpin – NC (output→)
mbcpin – NC (output→)
mbcpin – NC (output→)
mbcpin – NC (output→)
mbcpin – NC (output→)
md – NC (→input)
md – NC (→input)
md – NC (→input)
md – NC (→input)
md – NC (→input)
md – NC (→input)
md – NC (output→)
md – NC (output→)
md – NC (output→)
md – NC (output→)
md – NC (output→)
md – NC (output→)
mctl – NC (output→)
mctl – NC (output→)
mctl – NC (output→)
mctl – NC (→input)
mctl – NC (→input)
mctl – NC (→input)
mctl – NC (→input)
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mds – NC (output→)
mds – NC (output→)
mds – NC (→input)
mds – NC (→input)
mds – NC (→input)
mds – NC (output→)
mds – NC (output→)
mds – NC (output→)
mds – NC (output→)
mds – NC (→input)
mds – NC (→input)
mds – NC (→input)
mds – NC (→input)
mmem – NC (→input)
mmem – NC (output→)
mmem – NC (→input)
mlatch – NC (output→)
mlatch – NC (output→)
mlatch – NC (output→)
mlatch – NC (output→)
mlatch – NC (output→)
mlatch – NC (output→)
mlatch – NC (→input)
mlatch – NC (output→)
mlatch – NC (→input)
mlatch – NC (→input)
mlatch – NC (→input)
mlatch – NC (→input)
mlatch – NC (→input)
mlatch – NC (→input)
mo1 – NC (output→)
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npc – NC (output→)
npc – NC (output→)
npc – NC (→input)
npc – NC (→input)
mskg4 – NC (→input)
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mskg4 – NC (output→)
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olord1 – NC (→input)
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olord1 – NC (output→)
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platch – NC (output→)
platch – NC (output→)
platch – NC (→input)
platch – NC (output→)
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platch – NC (→input)
platch – NC (→input)
platch – NC (→input)
platch – NC (→input)
platch – NC (→input)
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pdlptr – NC (output→)
pdlptr – NC (output→)
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pdlptr – NC (→input)
pdlptr – NC (→input)
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smctl – NC (→input)
smctl – NC (→input)
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spc – NC (→input)
source – NC (output→)
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