← clock2 → contrl

CADR – CLOCK DISTRIBUTION [clockd]

Find File:

Find Pin:

This page:

clockd – CLK1 (→input)
clockd – CLK1 (→input)
clockd – CLK1 (output→)

Other pages:

clock2 – CLK1 (output→)

This page:

clockd – CLK1A (output→)

Other pages:

lc – CLK1A (→input)
vma – CLK1A (→input)

This page:

clockd – CLK2 (→input)

Other pages:

clock2 – CLK2 (output→)

This page:

clockd – CLK2A (→input)
clockd – CLK2A (→input)
clockd – CLK2A (output→)
clockd – CLK2A (output→)

Other pages:

lc – CLK2A (→input)
lc – CLK2A (→input)
lcc – CLK2A (→input)
vctl1 – CLK2A (→input)
vma – CLK2A (→input)
vma – CLK2A (→input)

This page:

clockd – CLK2B (output→)

Other pages:

q – CLK2B (→input)
q – CLK2B (→input)

This page:

clockd – CLK2C (→input)
clockd – CLK2C (output→)
clockd – CLK2C (output→)

Other pages:

iwr – CLK2C (→input)
lc – CLK2C (→input)
md – CLK2C (→input)
vctl1 – CLK2C (→input)
vma – CLK2C (→input)
vctl2 – CLK2C (→input)
vctl2 – CLK2C (→input)

This page:

clockd – CLK3 (→input)

Other pages:

clock2 – CLK3 (output→)

This page:

clockd – CLK3A (→input)
clockd – CLK3A (→input)
clockd – CLK3A (→input)
clockd – CLK3A (output→)
clockd – CLK3A (output→)

Other pages:

ireg – CLK3A (→input)
ireg – CLK3A (→input)

This page:

clockd – CLK3B (output→)

Other pages:

ireg – CLK3B (→input)
ireg – CLK3B (→input)

This page:

clockd – CLK3C (output→)

Other pages:

contrl – CLK3C (→input)
flag – CLK3C (→input)
lcc – CLK3C (→input)

This page:

clockd – CLK3D (→input)
clockd – CLK3D (→input)
clockd – CLK3D (→input)
clockd – CLK3D (output→)
clockd – CLK3D (output→)

Other pages:

actl – CLK3D (→input)
actl – CLK3D (→input)
actl – CLK3D (→input)

This page:

clockd – CLK3E (output→)

Other pages:

alatch – CLK3E (→input)
actl – CLK3E (→input)
dspctl – CLK3E (→input)

This page:

clockd – CLK3F (output→)

Other pages:

l – CLK3F (→input)
pdlptr – CLK3F (→input)
pdlptr – CLK3F (→input)

This page:

clockd – CLK3G (output→)

Other pages:

vctl1 – CLK3G (→input)

This page:

clockd – CLK4 (→input)

Other pages:

clock2 – CLK4 (output→)

This page:

clockd – CLK4A (output→)
clockd – CLK4A (→input)
clockd – CLK4A (→input)
clockd – CLK4A (→input)
clockd – CLK4A (output→)

Other pages:

mlatch – CLK4A (→input)
platch – CLK4A (→input)

This page:

clockd – CLK4B (output→)

Other pages:

lpc – CLK4B (→input)
npc – CLK4B (→input)
pdlctl – CLK4B (→input)
pdlctl – CLK4B (→input)

This page:

clockd – CLK4C (output→)

Other pages:

iwr – CLK4C (→input)
spclch – CLK4C (→input)

This page:

clockd – CLK4D (→input)
clockd – CLK4D (→input)
clockd – CLK4D (output→)
clockd – CLK4D (→input)
clockd – CLK4D (output→)

Other pages:

spclch – CLK4D (→input)
spcw – CLK4D (→input)

This page:

clockd – CLK4E (output→)
clockd – CLK4E (output→)

Other pages:

mctl – CLK4E (→input)
pdlctl – CLK4E (→input)
pdlctl – CLK4E (→input)

This page:

clockd – CLK4F (output→)

Other pages:

pdlctl – CLK4F (→input)
spc – CLK4F (→input)

This page:

clockd – HI1 (→input)

Other pages:

clock2 – HI1 (→input)
ictl – HI1 (→input)
ictl – HI1 (→input)
ictl – HI1 (→input)
olord2 – HI1 (→input)
olord2 – HI1 (→input)
olord2 – HI1 (→input)
olord2 – HI1 (→input)
olord2 – HI1 (→input)
olord2 – HI1 (output→)
spc – HI1 (output→)
spc – HI1 (→input)
spc – HI1 (→input)
spc – HI1 (→input)
spc – HI1 (→input)
spc – HI1 (→input)
spclch – HI1 (→input)
spy0 – HI1 (→input)
spy0 – HI1 (→input)
stat – HI1 (→input)
stat – HI1 (→input)

This page:

clockd – HI10 (→input)

Other pages:

spc – HI10 (output→)

This page:

clockd – HI11 (→input)
clockd – HI11 (→input)

Other pages:

dram2 – HI11 (→input)
dram2 – HI11 (→input)
dram2 – HI11 (→input)
dram2 – HI11 (→input)
dram2 – HI11 (→input)
dram2 – HI11 (→input)
lc – HI11 (→input)
mds – HI11 (→input)
spc – HI11 (output→)
vctl1 – HI11 (→input)
vctl1 – HI11 (→input)
vctl1 – HI11 (→input)
vctl1 – HI11 (→input)
vctl1 – HI11 (→input)
vctl1 – HI11 (→input)
vctl2 – HI11 (→input)
vctl2 – HI11 (→input)

This page:

clockd – HI12 (→input)
clockd – HI12 (→input)
clockd – HI12 (→input)
clockd – HI12 (→input)

Other pages:

alu1 – HI12 (→input)
alucry – HI12 (→input)
alucry – HI12 (→input)
alucry – HI12 (→input)
alucry – HI12 (→input)
alucry – HI12 (→input)
alucry – HI12 (→input)
alucry – HI12 (→input)
alucry – HI12 (→input)
aluc4 – HI12 (→input)
aluc4 – HI12 (→input)
aluc4 – HI12 (→input)
aluc4 – HI12 (→input)
aluc4 – HI12 (→input)
aluc4 – HI12 (→input)
aluc4 – HI12 (→input)
aluc4 – HI12 (→input)
spc – HI12 (output→)
vmemdr – HI12 (→input)

This page:

clockd – HI2 (→input)
clockd – HI2 (→input)
clockd – HI2 (→input)
clockd – HI2 (→input)

Other pages:

mctl – HI2 (→input)
mctl – HI2 (→input)
mctl – HI2 (→input)
mmem – HI2 (→input)
mmem – HI2 (→input)
olord2 – HI2 (→input)
olord2 – HI2 (output→)
opcs – HI2 (→input)
opcs – HI2 (→input)
pctl – HI2 (→input)
pctl – HI2 (→input)
pctl – HI2 (→input)
pctl – HI2 (→input)
spc – HI2 (output→)

This page:

clockd – HI3 (→input)

Other pages:

actl – HI3 (→input)
actl – HI3 (→input)
mmem – HI3 (→input)
mmem – HI3 (→input)
spc – HI3 (output→)

This page:

clockd – HI4 (→input)

Other pages:

contrl – HI4 (→input)
contrl – HI4 (→input)
contrl – HI4 (→input)
contrl – HI4 (→input)
contrl – HI4 (→input)
contrl – HI4 (→input)
contrl – HI4 (→input)
dram0 – HI4 (→input)
dram0 – HI4 (→input)
dram0 – HI4 (→input)
dram0 – HI4 (→input)
flag – HI4 (→input)
flag – HI4 (→input)
flag – HI4 (→input)
dspctl – HI4 (→input)
dspctl – HI4 (→input)
npc – HI4 (→input)
spc – HI4 (output→)
vctl1 – HI4 (→input)

This page:

clockd – HI5 (→input)
clockd – HI5 (→input)
clockd – HI5 (→input)
clockd – HI5 (→input)
clockd – HI5 (→input)
clockd – HI5 (→input)
clockd – HI5 (→input)
clockd – HI5 (→input)
clockd – HI5 (→input)
clockd – HI5 (→input)

Other pages:

alatch – HI5 (→input)
lpc – HI5 (→input)
spc – HI5 (output→)
source – HI5 (→input)

This page:

clockd – HI6 (→input)

Other pages:

dram0 – HI6 (→input)
dram0 – HI6 (→input)
dram0 – HI6 (→input)
dram0 – HI6 (→input)
dram0 – HI6 (→input)
dram0 – HI6 (→input)
dram2 – HI6 (→input)
dram2 – HI6 (→input)
dram2 – HI6 (→input)
dram1 – HI6 (→input)
dram1 – HI6 (→input)
dram1 – HI6 (→input)
dram1 – HI6 (→input)
dram1 – HI6 (→input)
dram1 – HI6 (→input)
dram1 – HI6 (→input)
dram1 – HI6 (→input)
dram1 – HI6 (→input)
dram1 – HI6 (→input)
spc – HI6 (output→)

This page:

clockd – HI7 (→input)
clockd – HI7 (→input)
clockd – HI7 (→input)
clockd – HI7 (→input)

Other pages:

q – HI7 (→input)
q – HI7 (→input)
spc – HI7 (output→)

This page:

clockd – HI8 (→input)

Other pages:

spc – HI8 (output→)

This page:

clockd – HI9 (→input)

Other pages:

spc – HI9 (output→)

This page:

clockd – LCRY3 (→input)
clockd – LCRY3 (output→)

Other pages:

lc – LCRY3 (→input)
lcc – LCRY3 (output→)

This page:

clockd – MCLK1 (→input)
clockd – MCLK1 (output→)
clockd – MCLK1 (→input)

Other pages:

clock2 – MCLK1 (output→)

This page:

clockd – MCLK1A (output→)

Other pages:

vctl1 – MCLK1A (→input)
vctl1 – MCLK1A (→input)
vctl1 – MCLK1A (→input)

This page:

clockd – NC (→input)
clockd – NC (→input)
clockd – NC (output→)
clockd – NC (output→)
clockd – NC (→input)
clockd – NC (→input)
clockd – NC (output→)
clockd – NC (output→)

Other pages:

This page:

clockd – RESET (→input)
clockd – RESET (output→)

Other pages:

actl – RESET (→input)
contrl – RESET (→input)
flag – RESET (→input)
lcc – RESET (→input)
olord2 – RESET (output→)
olord2 – RESET (→input)
olord2 – RESET (output→)
olord1 – RESET (→input)
olord1 – RESET (→input)
olord1 – RESET (→input)
pdlctl – RESET (→input)
vctl1 – RESET (→input)
vctl1 – RESET (→input)
vctl1 – RESET (→input)

This page:

clockd – SRCPDLIDX (output→)
clockd – SRCPDLIDX (→input)

Other pages:

opcd – SRCPDLIDX (→input)
pdlptr – SRCPDLIDX (→input)
source – SRCPDLIDX (output→)

This page:

clockd – SRCPDLPTR (output→)
clockd – SRCPDLPTR (→input)

Other pages:

opcd – SRCPDLPTR (→input)
pdlptr – SRCPDLPTR (→input)
source – SRCPDLPTR (output→)

This page:

clockd – TSE1 (→input)

Other pages:

clock2 – TSE1 (output→)

This page:

clockd – TSE1A (output→)

Other pages:

lc – TSE1A (→input)
lc – TSE1A (→input)
mf – TSE1A (→input)
mf – TSE1A (→input)
vmemdr – TSE1A (→input)

This page:

clockd – TSE1B (output→)

Other pages:

opcd – TSE1B (→input)
opcd – TSE1B (→input)
opcd – TSE1B (→input)
opcd – TSE1B (→input)
opcd – TSE1B (→input)

This page:

clockd – TSE2 (output→)
clockd – TSE2 (→input)

Other pages:

clock2 – TSE2 (output→)
md – TSE2 (→input)
qctl – TSE2 (→input)
qctl – TSE2 (→input)
vma – TSE2 (→input)

This page:

clockd – TSE3 (→input)

Other pages:

clock2 – TSE3 (output→)

This page:

clockd – TSE3A (output→)

Other pages:

actl – TSE3A (→input)
contrl – TSE3A (→input)
contrl – TSE3A (→input)
contrl – TSE3A (→input)
contrl – TSE3A (→input)
contrl – TSE3A (→input)

This page:

clockd – TSE4 (→input)

Other pages:

clock2 – TSE4 (output→)

This page:

clockd – TSE4A (output→)

Other pages:

actl – TSE4A (→input)
actl – TSE4A (→input)
mctl – TSE4A (→input)

This page:

clockd – TSE4B (output→)

Other pages:

pdlctl – TSE4B (→input)
pdlptr – TSE4B (→input)
pdlptr – TSE4B (→input)

This page:

clockd – UPPERHIGHOK (output→)

Other pages:

cpins – UPPERHIGHOK (output→)
mcpins – UPPERHIGHOK (output→)
olord2 – UPPERHIGHOK (→input)

This page:

clockd – WP1 (→input)

Other pages:

clock2 – WP1 (output→)

This page:

clockd – WP1A (output→)

Other pages:

vctl2 – WP1A (→input)
vctl2 – WP1A (→input)

This page:

clockd – WP1B (output→)

Other pages:

vctl2 – WP1B (→input)
vctl2 – WP1B (→input)

This page:

clockd – WP2 (output→)
clockd – WP2 (→input)

Other pages:

clock2 – WP2 (output→)
dram0 – WP2 (→input)
dram2 – WP2 (→input)
dram1 – WP2 (→input)

This page:

clockd – WP3 (→input)

Other pages:

clock2 – WP3 (output→)

This page:

clockd – WP3A (output→)

Other pages:

actl – WP3A (→input)

This page:

clockd – WP4 (→input)

Other pages:

clock2 – WP4 (output→)

This page:

clockd – WP4A (output→)

Other pages:

pdlctl – WP4A (→input)
pdlctl – WP4A (→input)
pdlctl – WP4A (→input)

This page:

clockd – WP4B (output→)

Other pages:

mctl – WP4B (→input)
mctl – WP4B (→input)

This page:

clockd – WP4C (output→)

Other pages:

contrl – WP4C (→input)
contrl – WP4C (→input)